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february 2017 docid027038 rev 4 1 / 15 this is information on a product in full production. www.st.com STL7N6LF3 automotive - grade n - channel 60 v, 35 m? typ., 6.5 a stripfet? f3 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d STL7N6LF3 60 v 43 m 6.5 a ? aec - q101 qualified ? logic level v gs(th) ? 175 c maximum junction temperature ? 100% avalanche rated ? wettable flank package applications ? switching applications description this device is an n - channel power mosfet develope d using stripfet? f3 technology. it is designed to minimize on - resistance and gate charge to provide superior switching performance. table 1: device summary order code marking package packing STL7N6LF3 7n6lf3 powerflat? 5x6 tape and reel
contents STL7N6LF3 2 / 15 docid027038 rev 4 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package information ................................ ................................ ....... 9 4.1 powerflat 5x6 wf type r package information ............................. 9 4.2 p acking information ................................ ................................ ......... 12 5 revision history ................................ ................................ ............ 14
STL7N6LF3 electrical ratings docid027038 rev 4 3 / 15 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 60 v v gs gate - source voltage 20 v i d (1) drain current (continuous) at t c = 25 c 20 a i d (1) drain current (continuous) at t c = 100 c 16 a i d (2) drain current (continuous) at t pcb = 25 c 6.5 a i d (2) drain current (continuous) at t pcb = 100 c 4.6 a i dm (3) , (2) drain current (pulsed) 26 a p tot (1) total dissipation at t c = 25 c 52 w p tot (2) total dissipation at t pcb = 25c 4.3 w i av not - repetitive avalanche current 6.5 a e as (4) single pulse avalanche energy 190 mj t j operating junction temperature range - 55 to 175 c t stg storage temperature range notes: (1) this value is rated according to r thj - case (2) this value is rated according to r thj - pcb (3) pulse width limited by safe operating area. (4) starting t j = 25 c, i d = 8 a, v dd = 25 v. table 3: thermal resitance symbol parameter value unit r thj - case thermal resistance junction - case 2.9 c/w r thj - pcb (1) thermal resistance junction - pcb 35 c/w notes: (1) when mounted on fr - 4 board of 1 inch2, 2oz cu, t < 10 s
electrical characteristics STL7N6LF3 4 / 15 docid027038 rev 4 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4: on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 250 a 60 v i dss zero gate voltage drain current v gs = 0 v, v ds = 60 v 1 a i gss gate - body leakage current v ds = 0 v, v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 1 2.5 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 3 a 35 43 m v gs = 5 v, i d = 3 a 48 60 m table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 v - 432 - pf c oss output capacitance - 93 - c rss reverse transfer capacitance - 10.5 - q g total gate charge v dd = 30 v, i d = 6.5 a, v gs = 0 to 10 v (see figure 13: "test circuit for gate charge behavior" ) - 8.7 - nc q gs gate - source charge - 1.9 - q gd gate - drain charge - 1.9 - r g intrinsic gate resistance f =1 mhz, id=0 a - 6.3 - table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 30 v, i d = 3 a, r g = 4.7 , v gs = 10 v (see figure 12: "test circuit for resistive load switching times" and figure 17: "switching time waveform" ) - 6.7 - ns t r rise time - 10.4 - t d(off) turn - off delay time - 32.4 - t f fall time - 5.4 -
STL7N6LF3 electrical characteristics docid027038 rev 4 5 / 15 table 7: source - drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 6.5 a i sdm (1) source - drain current (pulsed) - 26 a v sd (2) forward on voltage i ds = 6.5 a, v gs = 0 v - 1.3 v t rr reverse recovery time i sd = 6.5 a, di/dt = 100 a/s v dd = 48 v, t j = 150 c (see figure 14: "test circuit for inductive load switching and diode recovery times" ) - 24 ns q rr reverse recovery charge - 23.3 nc i rrm reverse recovery current - 1.9 a notes: (1) pulse width limited by safe operating area (2) pulsed: pulse duration = 300 s, duty cycle 1.5 %
electrical characteri stics STL7N6LF3 6 / 15 docid027038 rev 4 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : normalized v (br)dss vs temperature figure 7 : static drain - source on - resistance (m) d
STL7N6LF3 electrical characteristics docid027038 rev 4 7 / 15 figure 8 : gate charge vs gate - source voltage figure 9 : capacitance variation figure 10 : normalized gate threshold voltage vs temperature figure 11 : normalized on - resistance vs temperature
test circuits STL7N6LF3 8 / 15 docid027038 rev 4 3 test circuits figure 12 : test circuit for resistive load switching times figure 13 : test circuit for gate charge behavior figure 14 : test circuit for inductive load switching and diode recovery times figure 15 : unclamped inductive load test circuit figure 16 : unclamped inductive waveform figure 17 : switching time waveform
STL7N6LF3 package information docid027038 rev 4 9 / 15 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 powerflat 5x6 wf type r package informati on figure 18 : powerflat? 5x6 wf type r package outline a0y5_8231817_r_wf_rev_14
package information STL7N6LF3 10 / 15 docid027038 rev 4 table 8: powerflat? 5x6 wf type r mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 c 5.80 6.00 6.10 d 5.00 5.20 5.40 d2 4.15 4.45 d3 4.05 4.20 4.35 d4 4.80 5.00 5.10 d5 0.25 0.4 0.55 d6 0.15 0.3 0.45 e 1.27 e 6.20 6.40 6.60 e2 3.50 3.70 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 e6 0.20 0.325 0.45 e7 0.85 1.00 1.15 e9 4.00 4.20 4.40 e10 3.55 3.70 3.85 k 1.275 1.575 l 0.725 0.825 0.925 l1 0.175 0.275 0.375 ? 0 12
STL7N6LF3 package info rmation docid027038 rev 4 11 / 15 figure 19 : powerflat? 5x6 recommended footprint (dimensions are in mm) 8231817_footprint_rev14
package information STL7N6LF3 12 / 15 docid027038 rev 4 4.2 packing information figure 20 : powerflat? 5x6 wf tape (dimensions are in mm) figure 21 : powerflat? 5x6 package orientation in carrier tape
STL7N6LF3 package information docid027038 rev 4 13 / 15 figure 22 : powerflat? 5x6 reel (dimensions are in mm)
revision history STL7N6LF3 14 / 15 docid027038 rev 4 5 revision history table 9: document revision history date revi sion changes 14 - oct - 2014 1 first release. 10 - feb - 2015 2 updated table 4: on/off states, table 5: dynamic, table 6: switching times, table 7: source drain diode and section 4: package mechanical data. 26 - may - 2015 3 updated title and features. document status from preliminary to production data. 13 - feb - 2017 4 modified features on cover page. modified table 2: "absolute maximum ratings" and table 5: "dynamic" . minor text changes.
STL7N6LF3 docid027038 rev 4 15 / 15 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers s hould obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, select ion, and use of st products and st assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2017 stmicroelectronics C all rights reserved

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